Digital Verification Engineer (W/M)

Job Title            Digital IC verification engineer

Contract type   Permanent

Starting Date March 2022

Location            Paris, Caen, Grenoble - FRANCE

Offer date         26/10/2021

Offer Ref.          scx_dig_verif_2020

Job function    SCALINX’s design team is seeking a dynamic and highly motivated Digital IC verification engineer who will participate to the design of a state-of-the-art CMOS Transceiver ASIC for the Communications market. The candidate will be particularly involved in the verification of the digital processing functions of the ASIC in close collaboration with the mixed-signal and digital IC design engineers.

Work description

  • Define and implement verification methodologies
  • Elaborate detailed verification plan corresponding to the circuit specifications
  • Write block and top-level self-checking test benches
  • Implement regression tests on RTL and gate-level netlists
  • Support the Analog design team in mixed-signal simulations
  • Participate to the evaluation of the fabricated ASIC in our measurement lab
  • Work in team to successfully design a state-of-the art ASIC
  • Participate to design reviews
  • Write documentation in accordance with company QA policy

Qualification and Experience

  • You have a MSc or PhD in Electrical Engineering or equivalent and 3+ years of hands-on experience in digital IC verification
  • You have a solid background in digital electronic and signal processing
  • You have solid knowledge of a digital hardware description languages (VHDL or Verilog) and scripting languages (TCL, Perl, Python)
  • You have solid knowledge of System Verilog
  • Experience of UVM methodology is a plus
  • Experience in formal verification is a plus
  • Experience in gate-level simulation is a plus
  • You demonstrate good analytical and problem-solving skills
  • A previous experience in verification of digital functions for Mixed-Signal ICs such as A/D Converters, D/A Converters, and/or RF transceivers is a plus
  • A previous experience with Cadence or Synopsys RTL design flow is a plus
  • A previous experience with FPGA is a plus
  • You are a team player with a critical attitude and sense of initiative
  • You communicate fluently in English (oral and written)

How to apply

If you have a passion for IC design and the ambition to create something different, it will be a great pleasure to receive your resume at

SCALINX is committed to diversity & equity, we aim to improve disability inclusion within our workforce.