|Job Title||FPGA Validation Engineer|
|Location||Paris/Caen - FRANCE|
Job function SCALINX’s Software Team is looking for a dynamic and experienced FPGA Validation Engineer.
Ideally, the job location is in our Caen offices. However, Paris office applications will be considered assuming weekly travels to Caen.
- In charge of porting portions of a large SoC RTL code using FPGA platforms
- Software, System and Hardware debug
- Design and validate your FPGA designs
- Test automation
- Creation of validation reports
- Close interaction with the ASIC and SW team
Qualification and Experience
- B.S. + 5 years in RTL design/verification
- 4+ years experience with Verilog/VHDL and Xilinx FPGA tools
- Prior experience with prototyping, chip testing, validation, and lab debug
- Hands-on experience with lab instruments.
- Fluent with the complete FPGA design flow and debug
- Experience with Python, and TCL.
- Experience with Linux, scripting, and GIT.
- Embedded software experience with ARM processors is a plus
- Experience with SoC design flow is a plus (Synthesis. LEC, LINT, CDC, Static timing tools…)
How to apply
If you are motivated to participate in the creation of outstanding products in a dynamic environment, it will be a great pleasure to receive your resume at email@example.com
SCALINX is committed to diversity & equity. We aim to improve disability inclusion within our workforce.