| Job Title | Time-interleave RF DAC aggregation module Intern |
| Contract type | Internship |
| Starting Date | January 2024 for 4 to 6 months |
| Location | Caen – FRANCE |
| Offer date | 07/11/2023 |
| Offer Ref. | Intern_SCX2 |
Description The subject of the internship is the design of a temporal aggregation module for two current mode digital-to-analog converters (RF DACs) operating at very high speed with compensation for unpairing of individual DACs.
The objective is to combine the output of two fast DACs to double the effective throughput with a particular focus on the matching of temporal behaviors (clock skew, rising and falling edge of signals)
Qualification and Experience
CMOS technologies; Behavioral modelling; Transistor level analog design; Analog and mixed mode simulation.
How to apply
If you are interested by the subject of our internship, if you are dynamic, you like to learn, you are looking to evolve in an innovative and demanding environment, please send us your application: jobs@scalinx.com
SCALINX is committed to diversity & equity. We aim to improve disability inclusion within our workforce.